Invention Grant
- Patent Title: Method of forming a gate dielectric
- Patent Title (中): 形成栅极电介质的方法
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Application No.: US12039361Application Date: 2008-02-28
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Publication No.: US07741183B2Publication Date: 2010-06-22
- Inventor: Tien Ying Luo , Ning Liu , Mohamed S. Moosa
- Applicant: Tien Ying Luo , Ning Liu , Mohamed S. Moosa
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent James L. Clingan, Jr.; Robert L. King
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/31 ; H01L21/469

Abstract:
A method of forming a semiconductor device includes providing a substrate for the semiconductor device. A base oxide layer is formed overlying the substrate by applying a rapid thermal oxidation (RTO) of the substrate in the presence of oxygen. A nitrogen-rich region is formed within and at a surface of the base oxide layer. The nitrogen-rich region overlies an oxide region in the base oxide layer. Afterwards, the semiconductor device is annealed in a dilute oxygen and hydrogen-free ambient of below 1 Torr partial pressure of the oxygen. The annealing heals bond damage in both the oxide region and the nitrogen-rich region in the base oxide layer. After annealing the semiconductor device in the dilute oxygen ambient, in-situ steam generation (ISSG) is used to grow and density the oxide region in the base oxide layer at an interface between the substrate and base oxide layer.
Public/Granted literature
- US20090221120A1 METHOD OF FORMING A GATE DIELECTRIC Public/Granted day:2009-09-03
Information query
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