Invention Grant
- Patent Title: Delay circuit
- Patent Title (中): 延时电路
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Application No.: US11265104Application Date: 2005-11-03
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Publication No.: US07750710B2Publication Date: 2010-07-06
- Inventor: Kenichi Nomura
- Applicant: Kenichi Nomura
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2005-203054 20050712
- Main IPC: H03H11/26
- IPC: H03H11/26

Abstract:
A delay circuit has a second delay element 8 supplied with a delay time control signal Vcntl from a frequency variable oscillator 2 including a first delay element 8 of which delay time as a concomitant of signal propagation is controlled by a delay time control signal and a phase inverting element 9 inverting a phase of the signal, and an adjusting element 10, connected in series to the second delay element 8, to which the signal is propagated, wherein a total of the delay time of the second delay element 8 and the delay time of the adjusting element 10 is adjusted.
Public/Granted literature
- US20070013427A1 Delay circuit Public/Granted day:2007-01-18
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