发明授权
US07755188B2 Method and apparatus for stacking electrical components using via to provide interconnection 有权
使用通孔堆叠电气元件以提供互连的方法和装置

Method and apparatus for stacking electrical components using via to provide interconnection
摘要:
An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections between chips and leads on the leadframe are facilitated by bonding pads on chip active surfaces and by via that extend from the bonding pads through the chips to the back surfaces.
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