发明授权
US07764094B1 Clocking technique of multi-modulus divider for generating constant minimum on-time 失效
用于产生恒定最小导通时间的多模式分频器的时钟技术

  • 专利标题: Clocking technique of multi-modulus divider for generating constant minimum on-time
  • 专利标题(中): 用于产生恒定最小导通时间的多模式分频器的时钟技术
  • 申请号: US12058377
    申请日: 2008-03-28
  • 公开(公告)号: US07764094B1
    公开(公告)日: 2010-07-27
  • 发明人: Himanshu Arora
  • 申请人: Himanshu Arora
  • 申请人地址: BM Hamilton
  • 专利权人: Marvell International Ltd.
  • 当前专利权人: Marvell International Ltd.
  • 当前专利权人地址: BM Hamilton
  • 主分类号: H03L7/06
  • IPC分类号: H03L7/06
Clocking technique of multi-modulus divider for generating constant minimum on-time
摘要:
An apparatus and method for converting an input frequency signal to an output frequency signal is able to detect and lock onto the phase and frequency of the input signal by using a fractional-N divider phase-locked loop configuration, in which a frequency division signal is generated having an on time that is independent of the division ratio of a fractional-N divider.
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