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US07767099B2 Sub-lithographic interconnect patterning using self-assembling polymers 失效
使用自组装聚合物的亚光刻互连图案

Sub-lithographic interconnect patterning using self-assembling polymers
Abstract:
The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.
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