Invention Grant
US07767473B2 Multiple die wafers having increased reliability and methods of increasing reliability in same
有权
具有增加可靠性的多个晶片晶片以及提高可靠性的方法
- Patent Title: Multiple die wafers having increased reliability and methods of increasing reliability in same
- Patent Title (中): 具有增加可靠性的多个晶片晶片以及提高可靠性的方法
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Application No.: US12313150Application Date: 2008-11-17
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Publication No.: US07767473B2Publication Date: 2010-08-03
- Inventor: Paul I. Suciu , Kristopher R. Marcus , Charles B. Friedberg
- Applicant: Paul I. Suciu , Kristopher R. Marcus , Charles B. Friedberg
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; G01R31/26 ; G01N37/00

Abstract:
A method increases a reliability of packaged semiconductor integrated circuit dice by identifying one or more dice on a wafer having failed an electrical test. One or more failed dice are added to a character map. A first tier of buffer dice is added to the initial character map adjacent to each die on the character map. Both the failed dice and the first tier of buffer dice are indicated or marked, such as by inking, thereby indicating dice not requiring packaging. A wafer may include multiple die, with die corresponding to the die in the character map being marked. The marked die thus include die that have failed an electrical test plus die that may be likely to fail in the future due to their proximity to the failed die.
Public/Granted literature
- US20090166898A1 Method of increasing reliability of packaged semiconductor integrated circuit dice Public/Granted day:2009-07-02
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