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US07767511B2 Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile 有权
使用提高栅极掺杂的方法制造的半导体器件，同时保持良好的栅极分布

  • Patent Title: Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile
  • Patent Title (中): 使用提高栅极掺杂的方法制造的半导体器件，同时保持良好的栅极分布
  • Application No.: US11766191
    Application Date: 2007-06-21
  • Publication No.: US07767511B2
    Publication Date: 2010-08-03
  • Inventor: Mark R. Visokay
  • Applicant: Mark R. Visokay
  • Applicant Address: US TX Dallas
  • Assignee: Texas Instruments Incorporated
  • Current Assignee: Texas Instruments Incorporated
  • Current Assignee Address: US TX Dallas
  • Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
  • Main IPC: H01L21/8238
  • IPC: H01L21/8238
Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile
Abstract:
In one aspect, there is provided a method of manufacturing a semiconductor device. This method includes forming gate structures over a substrate, wherein the gate structures include gate electrodes located adjacent source/drain regions. A protective layer is formed over the gate structures and a CMP layer is formed over the protective layer. A portion of the CMP layer and the protective layer is removed to expose a portion of the gate electrodes with remaining portions of the CMP layer and the protective layer remaining over the source/drain regions. The exposed portions of the gate electrodes are doped with an n-type dopant or a p-type dopant, and the remaining portions of the CMP layer and the protective layer located over the source/drain regions are removed subsequent to the doping.
Abstract(Chinese):

一方面，提供一种制造半导体器件的方法。 该方法包括在衬底上形成栅极结构，其中栅极结构包括位于源极/漏极区附近的栅电极。 在栅极结构上形成保护层，并在保护层上形成CMP层。 去除CMP层和保护层的一部分以暴露一部分栅电极，其余部分的CMP层和保护层保留在源/漏区上。 栅电极的露出部分掺杂有n型掺杂剂或p型掺杂剂，并且在掺杂之后去除位于源极/漏极区之上的CMP层和保护层的其余部分。

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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78 ...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82 ....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822 .....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232 ......场效应工艺
H01L21/8234 .......MIS工艺
H01L21/8238 ........互补场效应晶体管，例如CMOS
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