Invention Grant
- Patent Title: Multilayer printed wiring board, method for manufacturing buildup printed wiring board, and electronic apparatus
- Patent Title (中): 多层印刷电路板，制造印刷线路板的制造方法以及电子设备
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Application No.: US12198794Application Date: 2008-08-26
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Publication No.: US07767914B2Publication Date: 2010-08-03
- Inventor: Kenji Hasegawa
- Applicant: Kenji Hasegawa
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Priority: JP2007-306012 20071127
- Main IPC: H05K1/11
- IPC: H05K1/11
Abstract:
A multilayer printed wiring board includes: an insulating base including an indentation section formed thereon; a conductor pattern formed on the insulating base, the conductor pattern including a thick film section formed by embedding a conductor in the indentation section; and a via hole section formed in an upper layer of the insulating base, the via hole section including a bottom portion that is in contact with the thick film section.
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