Invention Grant
- Patent Title: Multiple conduction state devices having differently stressed liners
- Patent Title (中): 具有不同应力衬垫的多导通状态器件
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Application No.: US11425511Application Date: 2006-06-21
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Publication No.: US07768041B2Publication Date: 2010-08-03
- Inventor: Dureseti Chidambarrao , David M. Onsongo
- Applicant: Dureseti Chidambarrao , David M. Onsongo
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent H. Daniel Schnurmann; Daryl K. Neff
- Main IPC: H01L31/00
- IPC: H01L31/00

Abstract:
A field effect transistor (“FET”) is provided which includes an active semiconductor region including a channel region, a first source-drain region and a second source-drain region. A major surface of the active semiconductor region is divided into a mutually exclusive first portion and a second portion. A first liner applies a first stress to the first portion of the major surface, and a second liner applies a second stress to the second portion of the major surface. The first and second stresses are each selected from high tensile stress, high compressive stress and neutral stress, with the first stress being different from the second stress. The liners can help to differentiate a first operating current conducted by the first portion of the FET under one operating condition and a second operating current that is conducted by the second portion of the FET under a different operating condition.
Public/Granted literature
- US20070296001A1 MULTIPLE CONDUCTION STATE DEVICES HAVING DIFFERENTLY STRESSED LINERS Public/Granted day:2007-12-27
Information query
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