Invention Grant
- Patent Title: DMOS transistor
- Patent Title (中): DMOS晶体管
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Application No.: US12425592Application Date: 2009-04-17
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Publication No.: US07768067B2Publication Date: 2010-08-03
- Inventor: Seiji Otake , Shuichi Kikuchi , Yasuhiro Takeda , Kenichi Maki
- Applicant: Seiji Otake , Shuichi Kikuchi , Yasuhiro Takeda , Kenichi Maki
- Applicant Address: JP Osaka JP Gunma
- Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee Address: JP Osaka JP Gunma
- Agency: Morrison & Foerster LLP
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119

Abstract:
This invention provides a DMOS transistor that has a reduced ON resistance and is prevented from deterioration in strength against an electrostatic discharge. An edge portion of a source layer of the DMOS transistor is disposed so as to recede from an inner corner portion of a gate electrode. A silicide layer is structured so as not to extend out of the edge portion of the source layer. That is, although the silicide layer is formed on a surface of the source layer, the silicide layer is not formed on a surface of a portion of a body layer, which is exposed between the source layer and the inner corner portion of the gate electrode. As a result, the strength against the electrostatic discharge can be improved, because an electric current flows almost uniformly through whole of the DMOS transistor without converging.
Public/Granted literature
- US20090261410A1 DMOS TRANSISTOR Public/Granted day:2009-10-22
Information query
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