Invention Grant
US07768076B2 Semiconductor device comprising an n-channel and p-channel MISFET
有权
包括n沟道和p沟道MISFET的半导体器件
- Patent Title: Semiconductor device comprising an n-channel and p-channel MISFET
- Patent Title (中): 包括n沟道和p沟道MISFET的半导体器件
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Application No.: US12113290Application Date: 2008-05-01
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Publication No.: US07768076B2Publication Date: 2010-08-03
- Inventor: Kazuaki Nakajima
- Applicant: Kazuaki Nakajima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2007-123362 20070508
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A semiconductor device has an n-channel MISFET having first diffusion layers formed in a first region of a surface portion of a semiconductor substrate so as to sandwich a first channel region therebetween, a first gate insulating film formed on the first channel region, and a first gate electrode including a first metal layer formed on the first gate insulating film, and a first n-type polysilicon film formed on the first metal layer, and a p-channel MISFET having second diffusion layers containing boron as a dopant and formed in a second region of the surface portion of the semiconductor substrate so as to sandwich a second channel region therebetween, a second gate insulating film formed on the second channel region, and a second gate electrode including a second metal layer containing nitrogen or carbon and formed on the second gate insulating film and a second n-type polysilicon film formed on the second metal layer and having a boron concentration of not more than 5×1019 cm−3 in a portion adjacent an interface with the second metal layer.
Public/Granted literature
- US20080277736A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2008-11-13
Information query
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