Invention Grant
US07768079B2 Transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachement 有权
具有高k介电隔离衬垫的晶体管,以减轻横向氧化物侵蚀

  • Patent Title: Transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachement
  • Patent Title (中): 具有高k介电隔离衬垫的晶体管,以减轻横向氧化物侵蚀
  • Application No.: US11862017
    Application Date: 2007-09-26
  • Publication No.: US07768079B2
    Publication Date: 2010-08-03
  • Inventor: Justin S. SandfordWilly Rachmady
  • Applicant: Justin S. SandfordWilly Rachmady
  • Applicant Address: US CA Santa Clara
  • Assignee: Intel Corporation
  • Current Assignee: Intel Corporation
  • Current Assignee Address: US CA Santa Clara
  • Agent David L. Guglielmi
  • Main IPC: H01L29/76
  • IPC: H01L29/76
Transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachement
Abstract:
Embodiments of the invention generally relate to transistors with high-k dielectric spacer liner to mitigate lateral oxide encroachment. In this regard a semiconductor device is introduced having a substrate, a high-k gate dielectric layer on the substrate, a metal gate electrode on the high-k gate dielectric layer, and a high-k dielectric layer on either side of and adjacent to the metal gate electrode and high-k gate dielectric layer, extending a distance away from the metal gate electrode and high-k gate dielectric layer on the substrate. Other embodiments are also disclosed and claimed.
Information query
Patent Agency Ranking
0/0