Invention Grant
US07768123B2 Stacked dual-die packages, methods of making, and systems incorporating said packages
有权
堆叠的双管芯封装,制造方法和结合所述封装的系统
- Patent Title: Stacked dual-die packages, methods of making, and systems incorporating said packages
- Patent Title (中): 堆叠的双管芯封装,制造方法和结合所述封装的系统
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Application No.: US11861967Application Date: 2007-09-26
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Publication No.: US07768123B2Publication Date: 2010-08-03
- Inventor: Yong Liu , Howard Allen , Qiuxiao Qian , Jianhong Ju
- Applicant: Yong Liu , Howard Allen , Qiuxiao Qian , Jianhong Ju
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Townsend and Townsend and Crew LLP
- Main IPC: H01L23/34
- IPC: H01L23/34

Abstract:
A semiconductor die package. It includes a substrate having a first surface and a second surface, a first semiconductor die having its front surface facing the first surface of the substrate, a conductive adhesive disposed between the first semiconductor die and the first surface of the substrate, and a second semiconductor die located on the first semiconductor die. The front surface of second semiconductor die faces away from the first semiconductor die, and the back surface faces toward the first semiconductor die. A plurality of conductive structures electrically couple regions at the front surface of the second semiconductor die to conductive regions at the first surface of the substrate.
Public/Granted literature
- US20090079092A1 Stacked Dual-Die Packages, Methods of Making, and Systems Incorporating Said Packages Public/Granted day:2009-03-26
Information query
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