Invention Grant
US07768217B2 Circuit and method for reducing east-west geometry mismatch between the top and bottom of a raster display
有权
用于减少光栅显示器顶部和底部之间的东西几何失配的电路和方法
- Patent Title: Circuit and method for reducing east-west geometry mismatch between the top and bottom of a raster display
- Patent Title (中): 用于减少光栅显示器顶部和底部之间的东西几何失配的电路和方法
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Application No.: US10820237Application Date: 2004-04-05
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Publication No.: US07768217B2Publication Date: 2010-08-03
- Inventor: Anatoliy V. Tsyrganovich
- Applicant: Anatoliy V. Tsyrganovich
- Applicant Address: US CA San Jose
- Assignee: ZiLOG, Inc.
- Current Assignee: ZiLOG, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Imperium Patent Works
- Agent Darien K. Wallace
- Main IPC: H01J29/56
- IPC: H01J29/56
Abstract:
The present disclosure describes a technique for reducing east-west geometry mismatch between the top and bottom of a raster display. This is accomplished by generating a horizontal correction signal that does not have any discontinuities. Since there are no discontinuities in the horizontal correction signal, the horizontal deflection current signal will not be distorted. As a result, there will be no east-west geometry mismatch between the top and bottom of the raster display.
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