Invention Grant
US07768331B1 State-retentive master-slave flip flop to reduce standby leakage current 有权
状态保持主从触发器,以减少备用漏电流

  • Patent Title: State-retentive master-slave flip flop to reduce standby leakage current
  • Patent Title (中): 状态保持主从触发器,以减少备用漏电流
  • Application No.: US12018734
    Application Date: 2008-01-23
  • Publication No.: US07768331B1
    Publication Date: 2010-08-03
  • Inventor: Manish Biyani
  • Applicant: Manish Biyani
  • Applicant Address: BM Hamilton
  • Assignee: Marvell International Ltd.
  • Current Assignee: Marvell International Ltd.
  • Current Assignee Address: BM Hamilton
  • Main IPC: H03K3/289
  • IPC: H03K3/289
State-retentive master-slave flip flop to reduce standby leakage current
Abstract:
A system for storing state values during standby mode operation comprises a master flip flop that receives and stores state information during active mode operation and an associated slave flip flop that receives and stores state information during active mode and standby mode operation. The system further comprises a standby mode control circuit to control the state of the master and slave flip flops during active and standby mode operation based on at least two control signals. A first transfer gate determines the current flow to and from the master flip flop based on the output of the standby mode control circuit. Similarly, a second transfer gate determines current flow to and from the slave flip flop based on the output of the standby mode control circuit. A first power supply powers the master flip flop during active mode operation. Similarly, a separate always-on power supply powers the slave flip flop and standby mode control circuit during active mode and standby mode operation to enable state retention.
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