Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US12264406Application Date: 2008-11-04
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Publication No.: US07768334B2Publication Date: 2010-08-03
- Inventor: Fumiyuki Yamane
- Applicant: Fumiyuki Yamane
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-313441 20071204
- Main IPC: G06F1/04
- IPC: G06F1/04

Abstract:
A semiconductor integrated circuit has a plurality of clock tree cells arranged in a tree structure on clock signal lines transmitting a clock signal, the plurality of clock tree cells forming a clock tree. The clock tree cells include first power supply lines connected to the clock tree cells, second power supply lines connected to logic circuits receiving a clock signal supplied from the clock tree, and a plurality of power supply pads connected to the first power supply lines and the second power supply lines.
Public/Granted literature
- US20090140788A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2009-06-04
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