The invention provides a circuit device for reducing the number of fabrication processes. A circuit portion 12 provides power supply voltage V10 to a node N0 through a first route 52 and power supply voltage V−5 to the node N0 through a second route 62. The circuit device includes a TFT 50 disposed on the first route 52, a TFT 60 disposed on the first route 52 and coupled to the TFT 50, a TFT 60 disposed on the second route 62, a TFT 61 disposed on the second route 62 and coupled to the TFT 60, a third route 54 providing power supply voltage V5 between V10 and V−5 to between the TFT 50 and 51, and a fourth route 64 providing power supply voltage V0 between V10 and V−5 to between the TFT 60 and 61.