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US07768762B2 Design structure for an on-chip high frequency electro-static discharge device 失效
片上高频静电放电装置的设计结构

Design structure for an on-chip high frequency electro-static discharge device
Abstract:
A design structure for an on-chip high frequency electro-static discharge device is described. In one embodiment, the electro-static discharge device comprises a substrate and multiple metal level layers disposed on the substrate. Each metal level comprises more than one electrode formed therein and more than one via connecting with some of the electrodes in adjacent metal levels. The device further includes a gap formed about one of the metal level layers, wherein the gap is hermetically sealed to provide electro-static discharge protection for the integrated circuit.
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