Invention Grant
- Patent Title: Memory read methods, apparatus, and systems
- Patent Title (中): 存储器读取方法,设备和系统
-
Application No.: US11945787Application Date: 2007-11-27
-
Publication No.: US07768839B2Publication Date: 2010-08-03
- Inventor: Seiichi Aritome
- Applicant: Seiichi Aritome
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
Some embodiments include first memory cells and a first line used to access the first memory cells, second memory cells and at least one second line used to access the second memory cells. The first and second memory cells have a number of threshold voltage values corresponding to a number of states. The states represent values of information stored in the memory cells. During a read operation to read the first memory cells, a first voltage may be applied to the first line and a second voltage may be applied to the second line. At least one of the first and second voltages may include a value based on a change of at least one of the threshold voltage values changing from a first value to a second value. The first and second values may correspond to a unique state selected from all of the states. Other embodiments including additional apparatus, systems, and methods are disclosed.
Public/Granted literature
- US20090135654A1 MEMORY READ METHODS, APPARATUS, AND SYSTEMS Public/Granted day:2009-05-28
Information query