Invention Grant
US07768842B2 Semiconductor memory device voltage generating circuit for avoiding leakage currents of parasitic diodes
失效
半导体存储器件电压产生电路,用于避免寄生二极管的漏电流
- Patent Title: Semiconductor memory device voltage generating circuit for avoiding leakage currents of parasitic diodes
- Patent Title (中): 半导体存储器件电压产生电路,用于避免寄生二极管的漏电流
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Application No.: US12207598Application Date: 2008-09-10
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Publication No.: US07768842B2Publication Date: 2010-08-03
- Inventor: Young Do Hur , Yeon Uk Kim
- Applicant: Young Do Hur , Yeon Uk Kim
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2008-0036309 20080418
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A voltage generating circuit for semiconductor memory devices for use in avoiding the occurrence of leakage currents associated with parasitic diodes is presented. The circuit controls and stabilizes the generation of a fedback negative voltage to prevent parasitic diode malfunctions by a in a wordline driver. The voltage generating circuit includes a controller being fedback the negative voltage and detecting a potential difference between backbias voltage provided to a substrate of the cell and the negative voltage to generate a control signal. The voltage generating circuit also includes a voltage generator being fedback the negative voltage to detect a level thereof, and which subsequently generates and provides the negative voltage in response to the detected results of the negative voltage and the control signal.
Public/Granted literature
- US20090262586A1 SEMICONDUCTOR MEMORY DEVICE VOLTAGE GENERATING CIRCUIT FOR AVOIDING LEAKAGE CURRENTS OF PARASITIC DIODES Public/Granted day:2009-10-22
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