Invention Grant
US07770179B1 Method and apparatus for multithreading on a programmable logic device 有权
用于可编程逻辑器件上多线程的方法和装置

Method and apparatus for multithreading on a programmable logic device
Abstract:
Programmable architecture for implementing a message processing system using an integrated circuit is described. In an example, configurable logic of the integrated circuit is configured to have a plurality of thread circuits and an interconnection topology amongst the plurality of thread circuits. Messages are concurrently processed using the plurality of thread circuits. Operation of at least one thread circuit of the plurality of thread circuits is controlled in accordance with control data received via the interconnection topology from at least one other thread circuit of the plurality of thread circuits.
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