A thin film transistor (TFT) array panel and a display device having the same are provided. The TFT array panel includes a substrate, an n−1th and an nth gate line formed on the substrate, a data line intersected with the n−1th gate line, a first source electrode overlapped with at least one portion of the n−1th gate line and connected to the data line, a first and a second drain electrode overlapped with at least one portion of the n−1th gate line and facing the first source electrode, a first sub pixel electrode electrically connected to the first drain electrode, a second sub pixel electrode electrically connected to the second drain electrode, a second source electrode overlapped with at least one portion of the nth gate line and electrically connected to the second sub pixel electrode, a third drain electrode overlapped with at least one portion of the nth gate line and facing the second source electrode, a third source electrode overlapped with at least one portion of the nth gate line, a fourth drain electrode overlapped with at least one portion of the nth gate line and facing the third source electrode, a third sub pixel electrode electrically connected to the fourth drain electrode; and a fourth sub pixel electrode capacitively coupled with the third sub pixel electrode.