A computer-implemented method for verification of a hardware design includes specifying requests to allocate regions in a memory of the hardware design, such that at least two of the requests are specified independently of one another. The requests indicate respective allocation types.Overlap restrictions are specified between at least some of the allocation types. The requests and the overlap restrictions are automatically converted to a constraint satisfaction problem (CSP), which includes CSP constraints based on the requests, the allocation types and the overlap restrictions.The CSP is solved to produce a random test program, which includes a memory map that allocates the regions in the memory while complying with the requests and the overlap restrictions. The test program is applied to the hardware design.