Invention Grant
- Patent Title: Semiconductor memory device and method of testing the same
- Patent Title (中): 半导体存储器件及其测试方法
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Application No.: US11837722Application Date: 2007-08-13
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Publication No.: US07791967B2Publication Date: 2010-09-07
- Inventor: Takahiro Suzuki , Shinya Fujisawa , Tokumasa Hara
- Applicant: Takahiro Suzuki , Shinya Fujisawa , Tokumasa Hara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-221991 20060816
- Main IPC: G11C29/12
- IPC: G11C29/12

Abstract:
A semiconductor memory device includes a semiconductor memory, an auto-operation control circuit which outputs a clock signal, a sync read control circuit which outputs a sync read address in sync with the clock signal, a read control circuit which selects a read address of the semiconductor memory in accordance with an address of the sync read address, a read sense amplifier circuit which outputs a data read signal that is produced by sensing data that is read out of the semiconductor memory in accordance with the read address, and a determination circuit which compares the data read signal with an expectation value.
Public/Granted literature
- US20080043553A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF TESTING THE SAME Public/Granted day:2008-02-21
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