发明授权
US07795970B2 Reduction of dead-time distortion in class D amplifiers 有权
减少D类放大器的死区时间失真

  • 专利标题: Reduction of dead-time distortion in class D amplifiers
  • 专利标题(中): 减少D类放大器的死区时间失真
  • 申请号: US12369489
    申请日: 2009-02-11
  • 公开(公告)号: US07795970B2
    公开(公告)日: 2010-09-14
  • 发明人: Cetin KayaAdam Shook
  • 申请人: Cetin KayaAdam Shook
  • 申请人地址: US TX Dallas
  • 专利权人: Texas Instruments Incorporated
  • 当前专利权人: Texas Instruments Incorporated
  • 当前专利权人地址: US TX Dallas
  • 代理商 John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
  • 主分类号: H03F3/217
  • IPC分类号: H03F3/217
Reduction of dead-time distortion in class D amplifiers
摘要:
Pulse-width-modulating class D amplifier with an H-bridge output stage, and method of operating the same. in which output stage dead-time is compensated. Offset logic circuitry detects various dead-time-related conditions at push-pull output drivers, and generates an offset signal applied to the amplified differential input signal, to adjust the time at which the voltage at differential signal lines crosses a ramp reference waveform. The offset signal can correspond to the duration of a disturbance (dead-time at one driver in combination with an active signal at the active driver), or the sum of that disturbance duration with a dead-time at the active driver. The offset signal is generated by charging a capacitor for the duration of this disturbance, or disturbance plus dead-time. According to another approach, error is reduced by charging a capacitor for each transition of the signal for a duration of the dead-time of the active driver. Total harmonic distortion is reduced without requiring increased circuit complexity and without shortening the dead-time to unsafe margins.
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