发明授权
- 专利标题: DMA engine for repeating communication patterns
- 专利标题(中): 用于重复通信模式的DMA引擎
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申请号: US11768795申请日: 2007-06-26
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公开(公告)号: US07802025B2公开(公告)日: 2010-09-21
- 发明人: Dong Chen , Alan G. Gara , Mark E. Giampapa , Philip Heidelberger , Burkhard Steinmacher-Burow , Pavlos Vranas
- 申请人: Dong Chen , Alan G. Gara , Mark E. Giampapa , Philip Heidelberger , Burkhard Steinmacher-Burow , Pavlos Vranas
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Scully, Scott, Murphy & Presser, P.C.
- 代理商 Daniel P. Morris, Esq.
- 主分类号: G06F13/28
- IPC分类号: G06F13/28
摘要:
A parallel computer system is constructed as a network of interconnected compute nodes to operate a global message-passing application for performing communications across the network. Each of the compute nodes includes one or more individual processors with memories which run local instances of the global message-passing application operating at each compute node to carry out local processing operations independent of processing operations carried out at other compute nodes. Each compute node also includes a DMA engine constructed to interact with the application via Injection FIFO Metadata describing multiple Injection FIFOs where each Injection FIFO may containing an arbitrary number of message descriptors in order to process messages with a fixed processing overhead irrespective of the number of message descriptors included in the Injection FIFO.
公开/授权文献
- US20090006296A1 DMA ENGINE FOR REPEATING COMMUNICATION PATTERNS 公开/授权日:2009-01-01
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