Invention Grant
- Patent Title: Defect analysis methods for semiconductor integrated circuit devices and defect analysis systems
- Patent Title (中): 半导体集成电路器件和缺陷分析系统的缺陷分析方法
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Application No.: US12007706Application Date: 2008-01-15
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Publication No.: US07822561B2Publication Date: 2010-10-26
- Inventor: Jong-hyun Lee
- Applicant: Jong-hyun Lee
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2007-0004322 20070115
- Main IPC: G01B5/28
- IPC: G01B5/28
Abstract:
A defect analysis method includes storing, in a database, data indicative of defects and analog characteristics of corresponding defective bits in a database. A first defective area in a first wafer is found, and analog characteristics of defective bits in the first defective area are measured. The measured analog characteristics and the analog characteristics stored in the database are compared to locate a defect causing the first defective area.
Public/Granted literature
- US20080172190A1 Defect analysis methods for semiconductor integrated circuit devices and defect analysis systems Public/Granted day:2008-07-17
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