Invention Grant
- Patent Title: Method of assembling a silicon stack semiconductor package
- Patent Title (中): 组装硅堆叠半导体封装的方法
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Application No.: US12124830Application Date: 2008-05-21
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Publication No.: US07824960B2Publication Date: 2010-11-02
- Inventor: Liu Hao , Ravi Kanth Kolan
- Applicant: Liu Hao , Ravi Kanth Kolan
- Applicant Address: SG Singapore
- Assignee: United Test and Assembly Center Ltd.
- Current Assignee: United Test and Assembly Center Ltd.
- Current Assignee Address: SG Singapore
- Agency: Sughrue Mion, PLLC
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of manufacturing a plurality of stacked die semiconductor packages, including: placing a phase change material between a top surface of a substrate and a bottom surface of a first die; placing a phase change material between a top surface of the first die and a bottom surface of a second die; wherein the first and second dies have a plurality of conductive protrusions on the bottom surfaces of the dies; wherein the first die has a plurality of conductive vias extending from its conductive protrusions, through the first die, to the top surface of the first die; wherein the conductive vias of said first die are in alignment with the conductive protrusions of the second die; and heating the dies and the substrate to cause the second die to become electrically interconnected to the first die and the first die to become electrically connected to the substrate.
Public/Granted literature
- US20080293186A1 METHOD OF ASSEMBLING A SILICON STACK SEMICONDUCTOR PACKAGE Public/Granted day:2008-11-27
Information query
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