Invention Grant
- Patent Title: Method of forming an integrated circuit
- Patent Title (中): 形成集成电路的方法
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Application No.: US12357163Application Date: 2009-01-21
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Publication No.: US07824988B2Publication Date: 2010-11-02
- Inventor: Alexander Hoefler , James D. Burnett , Lawrence N. Herr
- Applicant: Alexander Hoefler , James D. Burnett , Lawrence N. Herr
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Kim-Marie Vo; Susan C. Hill
- Main IPC: H01L21/8236
- IPC: H01L21/8236

Abstract:
A method includes forming a source, a drain, and a disposable gate (38) of the first transistor; forming a source, a drain, and a disposable gate of the second transistor; removing the disposable gates of the first transistor and the second transistor; forming a photoresist layer over the first transistor and the second transistor; patterning the photoresist layer to expose a gate region of the first transistor and a gate region of the second transistor; and implanting the substrate under the gate region of the first transistor and under the gate region of the second transistor, wherein implanting the substrate under the gate region of the first transistor provides a permanent shorting region between the source and the drain of the first transistor, and wherein implanting the substrate under the gate region of the second transistor adjusts a threshold voltage of the second transistor.
Public/Granted literature
- US20100181629A1 METHOD OF FORMING AN INTEGRATED CIRCUIT Public/Granted day:2010-07-22
Information query
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