Invention Grant
- Patent Title: Method of fabricating non-volatile memory device
- Patent Title (中): 制造非易失性存储器件的方法
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Application No.: US12345785Application Date: 2008-12-30
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Publication No.: US07824992B2Publication Date: 2010-11-02
- Inventor: Moon Sig Joo , Heung Jae Cho , Yong Soo Kim , Won Joon Choi
- Applicant: Moon Sig Joo , Heung Jae Cho , Yong Soo Kim , Won Joon Choi
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2008-0032272 20080407
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation layer pattern and the floating gate electrode layer pattern; forming an isolation layer by filling the isolation trench with a filling insulation layer; forming a hafnium-rich hafnium silicon oxide layer over the isolation layer and the floating gate electrode layer pattern; forming a hafnium-rich hafnium silicon oxynitride layer by carrying out a first nitridation on the hafnium-rich hafnium silicon oxide layer; forming a silicon-rich hafnium silicon oxide layer over the hafnium-rich hafnium silicon oxynitride layer; forming a silicon-rich hafnium silicon oxynitride layer by carrying out a second nitridation on the silicon-rich hafnium silicon oxide layer; and forming a control gate electrode layer over the silicon-rich hafnium silicon oxynitride layer.
Public/Granted literature
- US20090253242A1 Method of Fabricating Non-Volatile Memory Device Public/Granted day:2009-10-08
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