Invention Grant
- Patent Title: Semiconductor device fabrication method and semiconductor device
- Patent Title (中): 半导体器件制造方法和半导体器件
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Application No.: US12724019Application Date: 2010-03-15
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Publication No.: US07824996B2Publication Date: 2010-11-02
- Inventor: Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
- Applicant: Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JPP2001-095038 20010329; JPP2001-123632 20010420; JPP2001-123633 20010420; JPP2002-047944 20020225
- Main IPC: H01L21/302
- IPC: H01L21/302
Abstract:
A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
Public/Granted literature
- US20100196809A1 SEMICONDUCTOR DEVICE FABRICATION METHOD AND SEMICONDUCTOR DEVICE Public/Granted day:2010-08-05
Information query
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