Invention Grant
- Patent Title: Semiconductor manufacturing method
- Patent Title (中): 半导体制造方法
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Application No.: US11525215Application Date: 2006-09-22
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Publication No.: US07825035B2Publication Date: 2010-11-02
- Inventor: Shozo Yuge
- Applicant: Shozo Yuge
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Banner & Witcoff, Ltd.
- Priority: JP2005-276735 20050922
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor manufacturing method includes purging a growth chamber including a reaction product, a treatment chamber, and a glove box hermetically surrounding the growth chamber, with an inert gas atmosphere. The method also includes transferring the reaction product from the growth chamber to the treatment chamber, followed by moistening the reaction product in the treatment chamber, and extracting the moistened reaction product into the atmosphere.
Public/Granted literature
- US20070066075A1 Semiconductor manufacturing method Public/Granted day:2007-03-22
Information query
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