Invention Grant
- Patent Title: Epitaxial wafers, method for manufacturing of epitaxial wafers, method of suppressing bowing of these epitaxial wafers and semiconductor multilayer structures using these epitaxial wafers
- Patent Title (中): 外延晶片,外延晶片的制造方法,使用这些外延晶片抑制这些外延晶片的弯曲的方法和半导体多层结构
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Application No.: US12193811Application Date: 2008-08-19
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Publication No.: US07825417B2Publication Date: 2010-11-02
- Inventor: Masahiro Sakai , Mitsuhiro Tanaka , Takashi Egawa
- Applicant: Masahiro Sakai , Mitsuhiro Tanaka , Takashi Egawa
- Applicant Address: JP Nagoya
- Assignee: NGK Insulators, Ltd.
- Current Assignee: NGK Insulators, Ltd.
- Current Assignee Address: JP Nagoya
- Agency: Burr & Brown
- Priority: JP2003-205728 20030804; JP2004-178644 20040616
- Main IPC: H01L27/15
- IPC: H01L27/15 ; H01L21/00

Abstract:
A technique for suppressing the bowing of an epitaxial wafer is provided. The epitaxial wafer is prepared by successively epitaxially growing a target group III-nitride layer, an interlayer and another group III-nitride layer on a substrate with a buffer layer. The interlayer is mainly composed of a mixed crystal of GaN and InN expressed in a general formula (GaxIny)N (0≦x≦1, 0≦y≦1, x+y=1) (or a crystal of GaN), and does not contain Al. The interlayer is epitaxially formed at a lower growth temperature than those of the group III-nitride layers, more specifically at a temperature in a range of at least 350° C. to not more than 1000° C.
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