Invention Grant
US07825456B2 Semiconductor memory device with reduced power consumption 失效
具有降低功耗的半导体存储器件

Semiconductor memory device with reduced power consumption
Abstract:
A nonvolatile semiconductor memory device and a method for manufacturing the same that may include forming an isolation pattern in a substrate, and then etching a portion of the isolation pattern to expose a portion of an active region of the substrate, and then forming high-density second-type ion implantation regions spaced apart at both edges of the active region by performing a tilted ion implantation process, and then forming a high-density first-type ion implantation region as a bit line in the active region, and then forming an insulating layer on the substrate including the high-density first-type ion implantation region, the high-density second-type ion implantation regions and the isolation pattern, and then forming a metal interconnection as a word line on the insulating layer pattern and extending in a direction perpendicular to bit line.
Public/Granted literature
Information query
Patent Agency Ranking
0/0