Invention Grant
- Patent Title: Semiconductor device and manufacturing method therefor
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11414646Application Date: 2006-04-27
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Publication No.: US07825457B2Publication Date: 2010-11-02
- Inventor: Masatomi Okanishi
- Applicant: Masatomi Okanishi
- Applicant Address: US CA Sunnyvale
- Assignee: Spansion LLC
- Current Assignee: Spansion LLC
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low concentration diffusion region (24) that has a lower impurity concentration than the high concentration diffusion region (22) and is provided under the high concentration diffusion region (22), and a bit line (30) that includes the high concentration diffusion region (22) and the first low concentration diffusion region (24) and serves as a source region and a drain region, and a manufacturing method therefor. Reduction of source-drain breakdown voltage of the transistor is suppressed, and a low-resistance bit line can be formed. Thus, a semiconductor device that can miniaturize memory cells and a manufacturing method therefor can be provided.
Public/Granted literature
- US20070052017A1 Semiconductor device and manufacturing method therefor Public/Granted day:2007-03-08
Information query
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