Invention Grant
- Patent Title: Super-junction semiconductor element and method of fabricating the same
- Patent Title (中): 超结半导体元件及其制造方法
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Application No.: US11085155Application Date: 2005-03-22
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Publication No.: US07825466B2Publication Date: 2010-11-02
- Inventor: Yoshinao Miura , Hitoshi Ninomiya
- Applicant: Yoshinao Miura , Hitoshi Ninomiya
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2004-096388 20040329
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
The present invention provides a super-junction semiconductor element having a high voltage resistance and a low resistivity, while being successfully reduced in the size thereof, which comprises a semiconductor substrate 3; a pair of electrodes 1, 2 provided respectively on a top surface 12 and a back surface 13 of the semiconductor substrate 3; a parallel pn layer provided between the top surface 12 and the back surface 13 of said semiconductor substrate, having n-type semiconductor layers 4 allowing current flow under the ON state but being depleted under the OFF state, and p-type semiconductor layers 5 alternately arranged therein; and an insulating film 6 formed so as to surround the parallel pn layer; wherein the insulating film 6 is formed at a predetermined position.
Public/Granted literature
- US20050212053A1 Super-junction semiconductor element and method of fabricating the same Public/Granted day:2005-09-29
Information query
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