Invention Grant
US07825471B2 Semiconductor memory device including SRAM cell having well power potential supply region provided therein 失效
半导体存储器件包括其中设置有良好功率势能的SRAM单元

Semiconductor memory device including SRAM cell having well power potential supply region provided therein
Abstract:
A semiconductor memory device includes a first well region of a first conductivity type, first and second SRAM cells adjacently arranged to each other, the first and second SRAM cells each including at least a first transfer transistor and a drive transistor formed on the first well, the first transfer transistor and the drive transistor being coupled in series between a bit line and a power source line, and a first diffusion region of the first conductivity type arranged between the drive transistor of the first SRAM cell and the drive transistor of the second SRAM cell, to apply a first well potential to the first well.
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