Invention Grant
- Patent Title: Manufacturing process and structure for embedded semiconductor device
- Patent Title (中): 嵌入式半导体器件的制造工艺和结构
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Application No.: US12100653Application Date: 2008-04-10
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Publication No.: US07825500B2Publication Date: 2010-11-02
- Inventor: Chien-Hao Wang
- Applicant: Chien-Hao Wang
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: J.C. Patents
- Priority: TW97103478A 20080130
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A manufacturing process for an embedded semiconductor device is provided. In the manufacturing process, at least one insulation layer and a substrate are stacked to each other, and a third metal layer is laminated on the insulation layer to embed a semiconductor device in the insulation layer. The substrate has a base, a first circuit layer, a second circuit layer, and at least a first conductive structure passing through the base and electrically connected to the first circuit layer and the second circuit layer. In addition, the third metal layer is patterned to form a third circuit layer having a plurality of third pads.
Public/Granted literature
- US20090189270A1 MANUFACTURING PROCESS AND STRUCTURE FOR EMBEDDED SEMICONDUCTOR DEVICE Public/Granted day:2009-07-30
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