Invention Grant
- Patent Title: Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures
- Patent Title (中): 在多层半导体结构中形成对准的封盖金属线和互连
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Application No.: US10316484Application Date: 2002-12-11
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Publication No.: US07825516B2Publication Date: 2010-11-02
- Inventor: Stefanie Ruth Chiras , Michael Wayne Lane , Sandra Guy Malhotra , Fenton Reed Mc Feely , Robert Rosenberg , Carlos Juan Sambucetti , Philippe Mark Vereecken
- Applicant: Stefanie Ruth Chiras , Michael Wayne Lane , Sandra Guy Malhotra , Fenton Reed Mc Feely , Robert Rosenberg , Carlos Juan Sambucetti , Philippe Mark Vereecken
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Thomas A. Beck; Daniel P. Morris
- Main IPC: H01L23/532
- IPC: H01L23/532

Abstract:
In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable low K eff dielectric material surrounded by a material selected to be protection from outdiffusion and a source of a film thickness cap that is to form over the conductor metal and/or serve as a catalytic layer for electroless selective deposition of a CoWP capping .
Public/Granted literature
- US20040113277A1 Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures Public/Granted day:2004-06-17
Information query
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