Invention Grant
US07825517B2 Method for packaging semiconductor dies having through-silicon vias
有权
用于封装具有通硅通孔的半导体管芯的方法
- Patent Title: Method for packaging semiconductor dies having through-silicon vias
- Patent Title (中): 用于封装具有通硅通孔的半导体管芯的方法
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Application No.: US11778511Application Date: 2007-07-16
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Publication No.: US07825517B2Publication Date: 2010-11-02
- Inventor: Chao-Yuan Su
- Applicant: Chao-Yuan Su
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/48 ; H01L29/40
Abstract:
An integrated circuit structure is provided. The integrated circuit structure includes a die and an anisotropic conducing film (ACF) adjoining the back surface of the die. The die includes a front surface; a back surface on an opposite side of the die than the front surface; and a through-silicon via (TSV) exposed through the back surface of the die.
Public/Granted literature
- US20090020865A1 Method for Packaging Semiconductor Dies Having Through-Silicon Vias Public/Granted day:2009-01-22
Information query
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