Invention Grant
US07825683B2 On die termination device and semiconductor memory device including the same 有权
在晶片终端器件和包括其的半导体存储器件中

On die termination device and semiconductor memory device including the same
Abstract:
On die termination (ODT) device that can reduce the number of lines for transferring calibration codes to reduce the size of a chip including the ODT device. The ODT device includes a calibration circuit configured to generate calibration codes for determining a termination resistance, a counting circuit configured to generate counting codes increasing with time. A transferring circuit of the device is configured sequentially to transfer the calibration codes in response to the counting codes. A receiving circuit is configured sequentially to receive the calibration codes from the transferring circuit in response to the counting codes. A termination resistance circuit of the device is configured to perform impedance matching using a resistance determined according to the calibration codes.
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