Invention Grant
- Patent Title: Circuit for a low power mode
- Patent Title (中): 低功耗模式电路
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Application No.: US12372997Application Date: 2009-02-18
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Publication No.: US07825720B2Publication Date: 2010-11-02
- Inventor: Ravindraraj Ramaraju , David R. Bearden , Kenneth R. Burch , Charles E. Seaberg
- Applicant: Ravindraraj Ramaraju , David R. Bearden , Kenneth R. Burch , Charles E. Seaberg
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Kim Marie Vo; Joanna G. Chiu
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A circuit has a first transistor having a first current electrode coupled to a first supply voltage terminal and a second current electrode coupled to a virtual supply voltage node. A second transistor has a first current electrode coupled to the first supply voltage terminal and a control electrode coupled to the virtual supply voltage node. A first load has an input and has an output coupled to a second current electrode of the second transistor. A third transistor has a control electrode coupled to the output of the first load. A second load has an input coupled to the first supply voltage terminal, and has an output that is coupled to both a control electrode of the first transistor and a first current electrode of the third transistor. The virtual supply voltage node provides an operating voltage to a circuit module that alternates between normal and drowsy operating modes.
Public/Granted literature
- US20100207687A1 CIRCUIT FOR A LOW POWER MODE Public/Granted day:2010-08-19
Information query
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