Invention Grant
US07825723B1 Method and apparatus using an I/O device to eliminate a level shifter in low-voltage CMOS integrated circuits
有权
使用I / O装置消除低压CMOS集成电路中的电平移位器的方法和装置
- Patent Title: Method and apparatus using an I/O device to eliminate a level shifter in low-voltage CMOS integrated circuits
- Patent Title (中): 使用I / O装置消除低压CMOS集成电路中的电平移位器的方法和装置
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Application No.: US12400706Application Date: 2009-03-09
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Publication No.: US07825723B1Publication Date: 2010-11-02
- Inventor: Rabih F. Makarem
- Applicant: Rabih F. Makarem
- Applicant Address: US CA San Jose
- Assignee: Atheros Communications, Inc.
- Current Assignee: Atheros Communications, Inc.
- Current Assignee Address: US CA San Jose
- Agency: GSS Law Group
- Main IPC: G06G7/12
- IPC: G06G7/12 ; G06G7/26

Abstract:
This discloses an integrated circuit and at least one CMOS analog circuit including a first circuit component generating an output signal received by a second circuit component to generate a feedback signal received by the first component to regulate the output signal, where the transistors of the first circuit component consist of first MOS transistor instances compliant with a first core voltage and the feedback signal requires the transistors of the second circuit component to consist of at least one second MOS transistor instance compliant with a second core voltage above the first core voltage. The CMOS analog circuit may implement an amplifier, a transconductance amplifier and/or a telescopic amplifier. The first core voltage may at most 1.2 volts and the second core voltage may be at least three volts. The first MOS transistors may be thin oxide transistors and the second MOS transistors may be thicker oxide transistors.
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