Invention Grant
US07826266B2 Semiconductor device having global and local data lines coupled to memory mats
失效
具有耦合到存储器垫的全局和本地数据线的半导体器件
- Patent Title: Semiconductor device having global and local data lines coupled to memory mats
- Patent Title (中): 具有耦合到存储器垫的全局和本地数据线的半导体器件
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Application No.: US12498911Application Date: 2009-07-07
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Publication No.: US07826266B2Publication Date: 2010-11-02
- Inventor: Tomoyuki Ishii
- Applicant: Tomoyuki Ishii
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2000-013893 20000118
- Main IPC: G11C16/04
- IPC: G11C16/04
Abstract:
A semiconductor device includes a sense amplifier and a decoder provided on a semiconductor substrate together with memory cells provided above the sense amplifier and the decoder. Each of the memory cells includes a channel region, in which current flows in a direction perpendicular to a surface of the semiconductor substrate, a charge accumulation region provided along the channel region, and an insulator film provided between the channel region and the charge accumulation region.
Public/Granted literature
- US20090268519A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND DATA PROCESSOR DEVICE Public/Granted day:2009-10-29
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