Invention Grant
US07826270B2 Non-volatile semiconductor memory device and method of writing and reading the same
有权
非易失性半导体存储器件及其写入和读取方法
- Patent Title: Non-volatile semiconductor memory device and method of writing and reading the same
- Patent Title (中): 非易失性半导体存储器件及其写入和读取方法
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Application No.: US12329164Application Date: 2008-12-05
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Publication No.: US07826270B2Publication Date: 2010-11-02
- Inventor: Kazuhiro Tsumura
- Applicant: Kazuhiro Tsumura
- Applicant Address: JP Chiba
- Assignee: Seiko Instruments Inc.
- Current Assignee: Seiko Instruments Inc.
- Current Assignee Address: JP Chiba
- Agency: Brinks Hofer Gilson & Lione
- Priority: JP2007-320974 20071212
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
MOS transistors each having different ON withstanding voltages that are drain withstanding voltages when gates thereof are turned on are formed on the same substrate. One of the MOS transistors having the lower ON withstand voltage is used as a memory element. Using the fact that the drain withstanding voltage is low when a gate thereof is turned on, a short-circuit occurs in a PN junction between a drain and the substrate of the one of the MOS transistors having the lower ON withstand voltage to write data.
Public/Granted literature
- US20090175085A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF WRITING AND READING THE SAME Public/Granted day:2009-07-09
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