Invention Grant
- Patent Title: Memory circuit with high reading speed and low switching noise
- Patent Title (中): 具有高读取速度和低开关噪声的存储电路
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Application No.: US11953161Application Date: 2007-12-10
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Publication No.: US07826275B2Publication Date: 2010-11-02
- Inventor: Yung-Hsu Chen , Chun-Yu Liao , Chia-Jung Chen , Fu-Nian Liang
- Applicant: Yung-Hsu Chen , Chun-Yu Liao , Chia-Jung Chen , Fu-Nian Liang
- Applicant Address: TW Hsin-Chu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Volpe and Koenig PC
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A memory circuit with relatively high reading speed and relatively low switching noise is provided. The memory circuit includes an output buffer device having a first input receiving a data signal having a first voltage level, a second input receiving a pre-set voltage having a second voltage level and an output outputting the data signal, and a pre-set circuit constructed by a pair of MOSFETs and providing the pre-set voltage to the second input before the output buffer device receives the data signal. The pre-set circuit receives a control signal activating the pair of MOSFETs at the same time, and when the output buffer device receives the data signal, a voltage level of the second input is swung from the second level to the first voltage level.
Public/Granted literature
- US20090147591A1 MEMORY CIRCUIT WITH HIGH READING SPEED AND LOW SWITCHING NOISE Public/Granted day:2009-06-11
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