Invention Grant
US07826304B2 Simplified power-down mode control circuit utilizing active mode operation control signals
有权
利用有源模式操作控制信号的简化掉电模式控制电路
- Patent Title: Simplified power-down mode control circuit utilizing active mode operation control signals
- Patent Title (中): 利用有源模式操作控制信号的简化掉电模式控制电路
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Application No.: US12181426Application Date: 2008-07-29
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Publication No.: US07826304B2Publication Date: 2010-11-02
- Inventor: Ji Eun Jang
- Applicant: Ji Eun Jang
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2006-0003976 20060113
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A power-down control circuit utilizes the control signals employed in an active mode operation to operate when a power-down mode entry command is received during an active mode operation. The circuit is simplified requiring less area for devising the control circuit while lowering power consumption. The power-down control circuit in a semiconductor memory device includes at least a clock enable buffer unit, an external clock buffer unit, a latch unit, a control circuit for controlling internally operating clocks employed in active mode operation by using a control signal used in the active mode operation when a power-down mode entry command is received during the active mode operation, and a clock enable generation circuit for outputting clock enable signals for enabling entry to the power-down mode by using the clock control signals, when the external clock pulse signal is low level.
Public/Granted literature
- US20080279016A1 SIMPLIFIED-DOWN MODE CONTROL CIRCUIT UTILIZING ACTIVE MODE OPERATION CONTROL SIGNALS Public/Granted day:2008-11-13
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