Invention Grant
US07826655B2 Pattern correcting method of mask for manufacturing a semiconductor device
有权
用于制造半导体器件的掩模的图案校正方法
- Patent Title: Pattern correcting method of mask for manufacturing a semiconductor device
- Patent Title (中): 用于制造半导体器件的掩模的图案校正方法
-
Application No.: US11987654Application Date: 2007-12-03
-
Publication No.: US07826655B2Publication Date: 2010-11-02
- Inventor: Kei Yoshikawa , Satoshi Usui , Koji Hashimoto
- Applicant: Kei Yoshikawa , Satoshi Usui , Koji Hashimoto
- Applicant Address: JP Kawasaki-shi
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Kawasaki-shi
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP11-260270 19990914
- Main IPC: G06K9/00
- IPC: G06K9/00
Abstract:
A method of correcting a mask pattern for manufacturing a semiconductor device is disclosed. The method includes extracting a corner portion of a transistor portion. A distance from the corner portion to a line portion is extracted. A distance where the line portion does not overlap a rounding of the corner portion generated after a wafer process is obtained. A correction rule is made for a correction whether the corner portion is notched or not from the obtained distance. A corresponding relationship between the distance and an intersection part is obtained and a correction is made based on the correction rule to the corner portion.
Public/Granted literature
- US20080212869A1 Pattern correcting method of mask for manufacturing a semiconductor device Public/Granted day:2008-09-04
Information query
