In a processing system comprising a processor and a plurality of peripherals coupled to the processor, access privileges of a secure operating mode of the processor are delegated to at least a given one of the peripherals. The given peripheral is configured to store, in a secure portion of that peripheral, state information indicative of the processor being in a secure operating mode. The given peripheral is further configured to utilize the stored state information to allow the given peripheral to access at least one resource that is accessible to the processor in the secure operating mode but is not otherwise accessible to the given peripheral. The processing system may comprise, for example, a system on a chip, wherein the processor and peripherals are combined into a single integrated circuit.