Invention Grant
- Patent Title: Intergrated circuit and a method of cache remapping
- Patent Title (中): 集成电路和缓存重映射的方法
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Application No.: US10570290Application Date: 2004-08-17
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Publication No.: US07827372B2Publication Date: 2010-11-02
- Inventor: Adrianus Josephus Bink , Paul Stravers
- Applicant: Adrianus Josephus Bink , Paul Stravers
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP03103289 20030904
- International Application: PCT/IB2004/051465 WO 20040817
- International Announcement: WO2005/024843 WO 20050317
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28
Abstract:
An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.
Public/Granted literature
- US20070005897A1 Intergrated circuit and a method of cache remapping Public/Granted day:2007-01-04
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